0　Introduction

Frame synchronization is the key technology in digital communication systems, especially for the coded information using channel coding. It is very important for receivers to get the synchronization position before channel decoding. Conventional methods for frame synchronization are to insert a known pilot word into a transmitted information stream and the pilot word is checked at the receiver to get a sync position. The pilot word is a pseudo random sequence, which is highly auto-correlated and weakly cross-correlated. The pilot frame synchronization approaches have been investigated in Refs[1-4]. But nowadays, the signal needs to be synchronized at very low SNRs, which leads to the need for a longer pilot word, and the longer pilot word leads to the loss of bandwidth efficiency, yet it is very hard to improve the bandwidth efficiency by using the novel channel coding. For instance, the addition of a 78-bit pilot to a frame length of 1944 bits leads to a bandwidth efficiency loss of 0.17dB, but it is quite difficult to improve the coding gain even as small as 0.1dB. A frequency-domain frame synchronization method is proposed in Ref.[5], which is suitable for some future communication systems.

The essence of the frame synchronization algorithm is to locate and exploit the prior information in the received signal. The sending information is usually considered to be random, so it has no prior information and it is necessary to add the known pilot word as the prior information. But when the sending information is coded, it contains prior information which can be used to find the boundary of the frame. This is called pilotless frame synchronization. A valid codeword of a linear block code satisfies all the parity-check functions represented by the check matrix. If the right sync position of the frame is found, the valid codewords could be got; otherwise the codewords are invalid. So the right sync position can be located by exhaustively searching all the possible positions and verify the codewords with parity checking. The LDPC code was originally proposed by famous MIT Professor Gallager in 1962 and rediscovered its importance in 1996 in Ref.[6]. Now, it is viewed as the best candidate for the pilotless frame synchronization.

At present, most standard communication protocols still use pilot synchronization algorithm. The main reason is that pilotless frame synchronization algorithm needs to rely on encoding systems, and from the aspect of realization complexity, pilotless frame synchronization algorithm is far more complex than pilot frame synchronization algorithm. However, with the development of the technology, especially for some channel coding near the Shannon limit, the pilotless frame synchronization algorithm shows obvious advantages. For some channel coding, such as quasi-cyclic LDPC code, simplified hardware-implemented schemes have been proposed in some literature which will be discussed later. The discussion of the performance estimation of pilotless frame synchronization algorithm will also become more important. This paper is organized as follows. In Section 1, related work on pilotless frame synchronization of LDPC code is discussed. In Section 2, theoretical analysis of the pilotless frame synchronization is proposed. The FSER performance of theoretical analysis and simulation are compared in Section 3. It is found that the result of theoretical analysis is consistent with the simulation result under the condition of Gaussian channel and Rician fading channel. The relationship between the FSER performance and the structure of the check matrix is also revealed. Section 4 outlines some concluding remarks.

1　Related work

The LDPC coded frames are modulated by binary phase shift keying (BPSK) and perturbed by an additive white Gaussian noise (AWGN) channel with mean zero and variance N0, where N0 is the single-side noise power spectral density of the noise. The structure of the received signal buffer is shown in Fig.1.

where nc is the frame length which is usually equal to the code length of the LDPC code, μ is the true frame offset of the received signal, M is the number of the frames used for synchronization. The hard decision results of the received signal are saved in the buffer. If the estimated offset is equal to μ, then the exact offset position of the frame is found. Hnr×nc is the check matrix of the LDPC code, nc is the code length, and nr is the number of the constraint nodes of the check matrix. The hard-decision bit error rate (BER) of BPSK in AWGN channel is

(1)

where Q is the complementary cumulative normal distribution function, Es is the energy per symbol, N0 is the single side power spectral density Es/N0(dB)=Eb/N0(dB)+10lgR, where R is the code rate of the LDPC code.

If the data of current frame satisfies a check equation of the check matrix of the LDPC code, then this constraint node (check equation) is satisfied. The probability that a constraint node of degree dc is not satisfied is given by

(2)

where p represents the hard-decision bit error rate.

The probability that k constraint nodes from nc constraint nodes are satisfied is shown as follows

(3)

The distribution of the fraction of the satisfied constraint nodes for synchronized and unsynchronized cases can be derived from Eq.(3), however the distributions derived from Eq.(3) are not consistent with the simulation results. They share the same mean, but the variances of the simulation results are larger than the results derived from Eq.(3). This is because Eq.(3) is based on the assumption that all of the constraint nodes are pairwise independent. In fact, this assumption is not true. It is difficult to guarantee that any two constraint nodes are pairwise independent, even when the check matrix is sparse. In Ref.[7] only some qualitative conclusions related to the distribution of the fraction of the satisfied constraint nodes are presented. All the conclusions of Ref.[7] are based on the simulation distributions of the fraction of the satisfied constraint nodes, so it is very difficult to give a general theoretical analysis model for the frame synchronization performance of different LDPC codes.

The column and row degree distributions of these LDPC codes are listed in Table 1. Still, the Eb/N0 varies from 0dB to 2.5dB with the increasing step of 0.5dB.

ψ(t)

(4)

where St(nr) is the syndrome element for position t, Pr presents the probability. If the syndrome elements are independent, Eq.(4) can be simplified as

(5)

where The true frame synchronization position t0 can be estimated by minimizing LLR of the syndrome shown as

(6)

The properties of the method based on MAP are studied in Ref.[9]. The probability distributions involved in the synchronization criterion are found and the theoretical analysis of the FSER is deduced.

A new estimation procedure for the blind frame synchronization error rate (FSER) based on MAP approach was proposed in Ref.[10]. By considering the non-independence of the syndrome elements in theoretical analysis under the condition of Gaussian channel, the estimation of FSER is more precise than that in Ref.[9]. The relationship between the FSER performance and the weight distributions of the check matrix is revealed by the result of the theoretical analysis in Ref.[10].

The code length also has an influence on the FSER performance of LDPC codes and the effect is also analyzed with the method proposed in this paper. The LDPC code of (252,504), (504,1008) and (1008, 2016) are chosen. These three codes have the same row degree of 6 and column degree of 3, but have different code length. The FSER performances of these three codes by theoretical analysis are compared, and shown in Fig.8. The Eb/N0 varies from 0dB to 3dB with the increasing step of 0.5dB. The result shows that the FSER performance increases with the increment of code length.

A reduced complexity algorithm for blind frame synchronization based on code-constraints in a quasi-cyclic low density parity check (QC-LDPC) coded system was proposed in Ref.[11]. The methods proposed in Refs[7-10] were simplified for QC-LDPC code. The computational complexity of the hard and soft synchronizers is given. The method proposed in Refs[8-10] has better FSER performance than the method proposed in Ref.[7]. But the implementation complexity is very large according to Ref.[11], which means that the approach becomes intractable for hardware implementation. So the method proposed in Ref.[7] is more practical for implementation. Although the FSER performance is well estimated in Ref.[10] in AWGN channel, it is hard to derive the theoretical FSER performance in some time or frequency selective channels. In this paper, a good estimation of FSER performance based on the hard-decision result of the received signal in both AWGN and Rician fading channels is proposed.

2　Theoretical analysis

All the conclusions of Ref.[7] are based on the simulation distributions of the fraction of the satisfied constraint nodes, and it is thus very time-consuming, which makes it difficult to find a LDPC code with a better FSER performance.

In this section, the FSER performance of the pilotless frame synchronization of LDPC codes proposed in Ref.[7] is analyzed theoretically in a different way, and the non-independence between the constraint nodes is considered.

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(7)

where pe is the hard-decision BER of BPSK.

The probability that a constraint node of degree dc is not satisfied can be written as

Pdc_nsat=1-Pdc_sat

(8)

The probability of a frame not synchronized can be described as

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(9)

is defined, where is the probability of the satisfied kth constraint node of degree dc, is the probability of the unsatisfied kth constraint node of degree dc. The expectation and variance of Xk are

(10)

Define random variable X=X1+X2+…+Xnr, which represents the number of the satisfied constraint nodes in nr constraint nodes, where nr is the number of all the constraint nodes of the LDPC code. Actually, X satisfies the binomial distribution b(nr, Pdc_sat) under the condition that X1,X2,…,Xnr are pairwise independent.

The binomial distribution converges to the Gaussian distribution when nr→∞. So Gaussian approximation can be used to describe the probability distribution of X when nr is relatively large. The expectation and variance of X will be derived as follows. When the check matrix of the LDPC code is regular, Eqs(11) and (12) are got according to the rule of binomial distribution.

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E(X)=nrPdc_sat

(11)

D(X)=nrPdc_satPdc_nsat

(12)

If the check matrix of the LDPC code is irregular, then

(13)

(14)

The fraction of the satisfied constraint nodes in nr constraint nodes is defined as Y=X/nr, the expectation and variance can be written as

(15)

(16)

All of the above derivations are based on the assumption that all the constraint nodes are pairwise independent. In fact this assumption is very hard to satisfy even for a code with sparse check matrix, unless the column weight of the check matrix is one. As mentioned in Ref.[7], the distribution of simulation is very similar to the Gaussian distribution, even if the constraint nodes are not pairwise independent. But the variance derived from theoretical analysis in Ref.[7] is smaller than the simulation variance, which may be caused by the non-independence of the constraint nodes. So the variance of the random variable X will be deduced by considering the correlations of the constraint nodes. However the expectation of X by theoretical analysis is not influenced by the non-independence of the constraint nodes.

The variance of X can be written as

D(X)=E(X2)-(E(X))2

(17)

+pe·P2{XsXl=1}

(18)

where Xs and Xl are a pair of non-independent constraint nodes. Then how to calculate E(XsXl) is discussed. There is only one pair of common nonzero elements in the sth and the lth constraint node, because cycle-4 loops have been eliminated in check matrix of the LDPC code. Without loss of generality, it is assumed that the first pair of nonzero elements of the sth and the lth constraint node is the common nonzero elements. It is defined that XsXl=1 only if the sth and the lth constraint nodes are all satisfied. Then the expression of E(XsXl) will be deduced and will be discussed in two cases.

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(19)

In this case, the probability of XsXl=1 can be written as

(20)

(21)

In this case, the probability of XsXl can be written as

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(22)

Considering both cases above,

P{XsXl=1}=(1-pe)·P1{XsXl=1}

D(Xk) can be got from Eq.(10). Then let us discuss the non-independence of the constraint nodes. There are pairs of constraint nodes in nr rows of the check matrix. The pair number of the non-independent constraint node pairs is where nc is the column number of the check matrix and vj is the degree of the jth column of the check matrix. So pairs of constraint nodes are pairwise independent. If Xi and Xj are pairwise independent, E(XiXj)-E(Xi)E(Xj)=0, then the second item of Eq.(17) can be written as

(23)

is got

According to the property of (0-1) distribution,

E(XsXl)=P{XsXl=1}

(24)

is got

The values of E(XsXl) for different pairs of constraint nodes are not identical when the check matrix is irregular. It is difficult to find out all the pairs of non-independent constraint nodes and calculate their corresponding expectation E(XsXl). For simplicity, the average probability can be expressed as

(25)

where Pj_sat is the probability of a constraint node with degree j that is satisfied, {ρj} is the constraint node degree distribution of the LDPC code, dcmax and dcmin are the maximum and minimum row degree of the constraint nodes. Similarly

(26)

With the proposed method, the FSER performance of LDPC codes can be estimated with different degree distributions, code lengths and code rates under various channel conditions, which will greatly reduce analysis time compared to simulation and the proposed method makes it easy to find out candidate LDPC codes with a better synchronization performance.

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D(X)=

(27)

where and are the average probability of the constraint nodes with degree dc-1. The fraction of the satisfied constraint nodes in nr constraint nodes can be defined as Y′=X/nr, the variance can be written as

(28)

The expectation of Y′ keeps the same value as in Eq. (15), for the independence of the constraint nodes have no effect on the expectation value. When the frame sync position is right, pe can be calculated by Eq. (1), with opposite case, the received data is random for the constraint nodes, so pe=0.5. The variance of the fraction of the satisfied constraint nodes by simulation and theoretical analysis of synchronized case are compared in Fig.2.

Fig.2　Simulation and derived variance of the fraction of the satisfied constraint nodes for synchronized cases

The (972,1944) quasi-cyclic irregular LDPC code (972 is the info length and 1944 is the code length of the LDPC code) proposed for the IEEE 802.11n standard[12] is taken into account. There are 810 constraint nodes with degree-7 and 162 constraint nodes with degree-8 in this code. Eb/N0 varies from 0dB to 5dB with the interval of 0.5dB. The variance derived from the theoretical analysis proposed in this paper is consistent with the variance by simulations, however the variance of the fraction of the satisfied constraint nodes in nr constraint nodes proposed in Ref.[7] is much smaller. It is found out that the variance increases with the increment of Eb/N0, which is a counter-intuitive effect mentioned in Ref.[7], now it can be explained by theoretical analysis. This variance estimation error caused by non-independence between the constraint nodes is solved in this work. The variance for unsynchronized case is shown in Fig.3.

Fig.3　Simulation and derived variance of the fraction of the satisfied constraint nodes for unsynchronized cases

The variance derived from the theoretical analysis proposed in this paper is also consistent with the variance by simulations and the variance is independent of Eb/N0 in the case of unsynchronization.

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Now the expectation and variance of the fraction of the satisfied constraint nodes by using Gaussian approximation can be got and the discrete probability mass function of the fraction of the satisfied constraint nodes for synchronized and unsynchronized cases can be got further. The probability is

P0(k)

(29)

where k∈[1, nr], μF and σF are the expectation and the variance of the fraction of the satisfied constraint nodes for synchronized or unsynchronized cases, respectively.

The discrete probability distributions of the fraction of the satisfied constraint nodes for synchronized and unsynchronized cases are shown in Fig.4.

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Fig.4　Simulated and derived probability distribution of the fraction of the satisfied constraint nodes for unsynchronized and synchronized cases

The theoretical derived probability distributions are in agreement with the simulated ones for synchronized and unsynchronized cases.

The expectation of the fraction of the satisfied constraint nodes for synchronized case declines with the decrease of the Eb/N0. For unsynchronized case, the expectation is 0.5 without fluctuation. The probability distributions for synchronized and unsynchronized cases have an overlapped region which results in the frame synchronization errors. The area of the overlapped region increases with the decrease in the Eb/N0. If all the possible frame offset positions are traversed, the position of maximum fraction of the satisfied constraint nodes is more likely to be correct frame offset position and this method is known as the maximum method[1]. For the next step, the expression of the FSER is deduced with the maximum method.

There are two states for all of the constraint nodes, one is the data for frame synchronization is satisfied with the constraint node, and the other is not satisfied. Random variable Xk is defined which means the state of the kth constraint node. When the kth constraint node is not satisfied, Xk=0, otherwise, Xk=1. It is obvious that the random variable Xk has only two possible values 0 and 1. So random variable Xk is satisfied with (0-1) distribution. Then

PFSE=1-PFSR=1-P{Xμ>max(Xi)}

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(30)

where PFSE is the probability that the frame is not synchronized, PFSR is the probability that fame is synchronized, Xμ is the fraction of the satisfied constraint nodes for synchronized case and Xi is the fraction of the satisfied constraint nodes for all the unsynchronized case, i∈(1,2,…,μ-1, μ+1,…,nc). Xi satisfies the i.i.d (identically and independently distributed) in the case of unsynchronization, the discrete probability mass function of the maximum value of Xi can be written as

(31)

where μunsync and σunsync are the expectation and variance of the fraction of the satisfied constraint nodes for the unsynchronized cases. The expression of the FSER can be described as

(32)

where P0 is the probability of the fraction of the satisfied constraint nodes for the synchronized case described in Eq.(29) and P1 is the probability described in Eq.(31).

If Eq.(1) is replaced with the hard decision BER of BPSK under other channel condition, all of the above conclusions are also correct under any other channel conditions. The wireless channels are generally modeled as time or frequency selective channel such as the Rician fading channel. The theoretical hard decision BER of BPSK in the Ricain channel is presented in Ref.[13]. Fig.5 shows the theoretical hard decision BER performance of BPSK in the Rician fading channel, where K represents the ratio of the power in the direct path to the power in the other. The Rician fading channel is degraded to Rayleigh fading channel when K tends to 0. When K tends to ∞, the Rician fading channel will degenerate towards Gaussian channel.

Fig.5　The hard decision BER performance of BPSK under the condition of the Rician fading channel

3　Simulation and discussion

The (972, 1944) LDPC code, an irregular LDPC code is chosen to verify the theoretical expression of the FSER in AWGN channel. The Eb/N0 varies from 0dB to 2.5dB with the increasing step of 0.5dB. The FSER performances of simulation and theoretical analysis are shown in Fig.6. The result shows that the FSER

performance derived from theoretical analysis and simulation are almost identical. This proves the feasibility of the FSER performance evaluation of an LDPC code by theoretical analysis, which is less time-consuming compared to simulation.

Then, theoretical methods are used to analyze several kinds of LDPC codes, with the identical code length and code rate but different degree distributions of the check matrix.

Here the influence of the degree distribution of the check matrix on the the FSER performance is discussed. Three kinds of (504,1008) LDPC code[14] are chosen. The FSER performances of the three kinds of (504,1008) LDPC codes by theoretical analysis and simulations are shown in Fig.7.

A blind frame synchronization method based on a Maximum A Posteriori probability (MAP) approach was proposed in Ref.[8]. This method is based on the log-likelihood ratios (LLR) of the syndrome obtained by the check matrix of the LDPC code. The LLR of the syndrome can be expressed as

The results show that the FSER performance of theoretical analysis obeys the simulations very well. The FSER performances of Code I and Code II are very similar, however the FSER performance of Code III is significantly worse than those of Code I and Code II. The result can be explained by the theoretical analysis proposed above. The row degree distribution has an effect on the expectation of the fraction of the satisfied constraint nodes. The larger row degree leads to a smaller expectation of the fraction of the satisfied constraint nodes. It will add the overlapped area of the probability distribution function of synchronized and unsynchronized cases and deteriorate the FSER performance. The row degrees of Code I and Code II are different but they share the same mean, and the column degrees of them are identical, so the FSER performances of the two LDPC codes are very similar. The column degree has an effect on the correlations between constraint nodes and a large column degree leads to a large variance of the fraction of the satisfied constraint nodes. The larger variance leads to the worse FSER performance. The row and column degrees of Code III are much larger than those of Code I and Code II, which leads to a larger variance and smaller expectation of the fraction of the satisfied constraint nodes. The FSER performance is therefore deteriorated significantly.

与传统转轮静平衡试验工具一样，其原理是利用平衡球心与平衡物体的重心的相应位置，在保证一定灵敏度下获得平衡[2]。对于不同重量的平衡物体，平衡物体的总重量和平衡球心与平衡物体重心的距离h值(以下称h值)的关系，采用表1数值。

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The (504,1008) LDPC code is chosen to verify the theoretical expression of the FSER in Rician fading channel. The Eb/N0 varies from 0dB to 3.5dB with the increasing step of 0.5dB. The FSER performances of simulation and theoretical analysis are shown in Fig.9. The result shows that the FSER performance derived from theoretical analysis and simulation are almost identical.

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where Pj_nsat is the probability of a constraint node with degree j that is not satisfied. The variance of X can be written as,

比如：假如中国向美国进口猪肉少了转而向巴西阿根廷进口更多的肉类，这单对航运来讲反而是有利的。虽然目前各大航运公司都在密切观察事态发展的方向，但是目前很难说会对航运公司产生实质性的影响。只是在新的关税政策下一些物流公司可能会产生的更多的工作。

Fig.9　The FSER performance comparison of (504,1008) LDPC code under the condition of the Rician fading channel

4　Conclusion

A method is proposed to estimate the FSER performance of LDPC codes in Gaussian channel and Rician fading channel. The probability distributions of the fraction of the satisfied constraint nodes are theoretically derived by the Gaussian approximation. The theoretical and simulation results of the probability distributions coincide completely with each other due to the consideration of the non-independence between the constraint nodes. The FSER derived from theoretical analysis is consistent with that from simulation very well, so the estimations of the FSER for different kinds of LDPC codes become more efficient. Furthermore, the effect of check matrix degree distributions on the FSER performance can be quantitatively studied by theoretical analysis and the basic principles of constructing LDPC codes with a better synchronization performance are revealed. High effective method is required for the research of pilotless frame synchronization. Compared to the traditional method based on the simulation, the proposed method significantly improves the efficiency in finding LDPC codes with better frame synchronization performance.

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XueWen, born in 1979. He is a Ph.D candidate in Nanjing University of Science and Technology, Nanjing (China). He received his M.S. degree in School of Electronic and Optical Engineering, Nanjing University of Science and Technology, Nanjing (China), in 2004. He also received his B.S. degree in School of Electronic and Optical Engineering, Nanjing University of Science and Technology,Nanjing (China), in 2002. His main research interests are digital communications.